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[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.info] - Rev 509

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508 Updates for Or1ksim 0.5.0rc3. jeremybennett 5011d 11h /openrisc/trunk/or1ksim/doc/or1ksim.info
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5076d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
472 Various changes which improve the quality of the tracing. jeremybennett 5095d 14h /openrisc/trunk/or1ksim/doc/or1ksim.info
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5103d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
451 More tidying up. jeremybennett 5124d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 5124d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5130d 01h /openrisc/trunk/or1ksim/doc/or1ksim.info
440 Updated documentation to describe new Ethernet usage. jeremybennett 5131d 02h /openrisc/trunk/or1ksim/doc/or1ksim.info
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5139d 21h /openrisc/trunk/or1ksim/doc/or1ksim.info
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5143d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
432 Updates to handle interrupts correctly. jeremybennett 5144d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5147d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 5147d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5158d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5158d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.
jeremybennett 5198d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
346 Changes to support Or1ksim 0.5.0rc1

Top level changes:

* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.

Changes in testsuite:

* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.

Changes in testsuite/test-code-or1k:

* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
jeremybennett 5223d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
240 or1ksim build fixups for Cygwin copilation julius 5253d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5257d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5257d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info

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