OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.texi] - Rev 101

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5667d 02h /openrisc/trunk/or1ksim/doc/or1ksim.texi
100 Single precision FPU stuff for or1ksim julius 5667d 04h /openrisc/trunk/or1ksim/doc/or1ksim.texi
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5673d 03h /openrisc/trunk/or1ksim/doc/or1ksim.texi
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5694d 01h /openrisc/trunk/or1ksim/doc/or1ksim.texi
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5702d 00h /openrisc/trunk/or1ksim/doc/or1ksim.texi
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 6032d 09h /openrisc/trunk/or1ksim/doc/or1ksim.texi

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.