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224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5131d 20h /openrisc/trunk/or1ksim/doc/version.texi
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5138d 12h /openrisc/trunk/or1ksim/doc/version.texi
202 Adding executed log in binary format capability to or1ksim julius 5144d 16h /openrisc/trunk/or1ksim/doc/version.texi
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5161d 17h /openrisc/trunk/or1ksim/doc/version.texi
134 Updates for stable release 0.4.0 jeremybennett 5169d 20h /openrisc/trunk/or1ksim/doc/version.texi
127 New config option to allow l.xori with unsigned operand. jeremybennett 5175d 17h /openrisc/trunk/or1ksim/doc/version.texi
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5176d 13h /openrisc/trunk/or1ksim/doc/version.texi
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5176d 17h /openrisc/trunk/or1ksim/doc/version.texi
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5177d 13h /openrisc/trunk/or1ksim/doc/version.texi
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5178d 10h /openrisc/trunk/or1ksim/doc/version.texi
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5180d 13h /openrisc/trunk/or1ksim/doc/version.texi
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5182d 13h /openrisc/trunk/or1ksim/doc/version.texi
110 or1ksim make check should work without a libc in the or32-elf tools julius 5183d 14h /openrisc/trunk/or1ksim/doc/version.texi
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5185d 13h /openrisc/trunk/or1ksim/doc/version.texi
104 Candidate release 0.4.0rc4 jeremybennett 5188d 21h /openrisc/trunk/or1ksim/doc/version.texi
100 Single precision FPU stuff for or1ksim julius 5197d 17h /openrisc/trunk/or1ksim/doc/version.texi
99 Bug in test evaluation for library fixed. jeremybennett 5202d 15h /openrisc/trunk/or1ksim/doc/version.texi
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5203d 16h /openrisc/trunk/or1ksim/doc/version.texi
96 Various changes which had not been picked up in earlier commits. jeremybennett 5218d 23h /openrisc/trunk/or1ksim/doc/version.texi
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5224d 14h /openrisc/trunk/or1ksim/doc/version.texi

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