| Rev |
Log message |
Author |
Age |
Path |
| 483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
5025d 19h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 432 |
Updates to handle interrupts correctly. |
jeremybennett |
5093d 13h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
5107d 14h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 385 |
Updates for Or1ksim 0.5.0rc2.
* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.
* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected. |
jeremybennett |
5147d 15h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 236 |
Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.
* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions. |
jeremybennett |
5206d 12h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 230 |
Changed library interface. Fixed namespace problems with instruction lookup in library.
* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int. |
jeremybennett |
5209d 10h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 224 |
Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. |
jeremybennett |
5211d 18h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 220 |
Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. |
jeremybennett |
5218d 10h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 143 |
Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). |
jeremybennett |
5241d 14h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 98 |
Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. |
jeremybennett |
5283d 14h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 97 |
Updates to test the new JTAG library interface (not yet complete). |
jeremybennett |
5297d 20h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 93 |
Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. |
jeremybennett |
5304d 11h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 82 |
Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".
Incorporate Mark Jarvis's fixes for Mac OS X. |
jeremybennett |
5312d 10h |
/openrisc/trunk/or1ksim/libtoplevel.c |
| 19 |
Initial commit of Or1ksim 0.3.0 into the new repository |
jeremybennett |
5642d 20h |
/openrisc/trunk/or1ksim/libtoplevel.c |
