OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [eth.c] - Rev 435

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5116d 15h /openrisc/trunk/or1ksim/peripheral/eth.c
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 5120d 18h /openrisc/trunk/or1ksim/peripheral/eth.c
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5123d 14h /openrisc/trunk/or1ksim/peripheral/eth.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5235d 23h /openrisc/trunk/or1ksim/peripheral/eth.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5336d 15h /openrisc/trunk/or1ksim/peripheral/eth.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5667d 01h /openrisc/trunk/or1ksim/peripheral/eth.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.