OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [mc.c] - Rev 118

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 Candidate release 0.4.0rc4 jeremybennett 5291d 00h /openrisc/trunk/or1ksim/peripheral/mc.c
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5305d 20h /openrisc/trunk/or1ksim/peripheral/mc.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5334d 17h /openrisc/trunk/or1ksim/peripheral/mc.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5665d 02h /openrisc/trunk/or1ksim/peripheral/mc.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.