OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [memory.c] - Rev 552

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5044d 09h /openrisc/trunk/or1ksim/peripheral/memory.c
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5126d 06h /openrisc/trunk/or1ksim/peripheral/memory.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5230d 08h /openrisc/trunk/or1ksim/peripheral/memory.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5661d 09h /openrisc/trunk/or1ksim/peripheral/memory.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.