URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [memory.c] - Rev 561

Rev	Log message	Author	Age	Path
483	Updated with new opcodes to generate random numbers and to identify us as Or1ksim.	jeremybennett	5045d 22h	/openrisc/trunk/or1ksim/peripheral/memory.c
418	Or1ksim - adding new option when configuring memories, "exitnops"	julius	5127d 19h	/openrisc/trunk/or1ksim/peripheral/memory.c
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5231d 21h	/openrisc/trunk/or1ksim/peripheral/memory.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5662d 22h	/openrisc/trunk/or1ksim/peripheral/memory.c