OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [pic/] [pic.c] - Rev 592

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
440 Updated documentation to describe new Ethernet usage. jeremybennett 4960d 00h /openrisc/trunk/or1ksim/pic/pic.c
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4968d 18h /openrisc/trunk/or1ksim/pic/pic.c
432 Updates to handle interrupts correctly. jeremybennett 4973d 04h /openrisc/trunk/or1ksim/pic/pic.c
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4976d 00h /openrisc/trunk/or1ksim/pic/pic.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5091d 08h /openrisc/trunk/or1ksim/pic/pic.c
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5098d 00h /openrisc/trunk/or1ksim/pic/pic.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5522d 10h /openrisc/trunk/or1ksim/pic/pic.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.