OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [pic/] [pic.c] - Rev 589

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
440 Updated documentation to describe new Ethernet usage. jeremybennett 5093d 01h /openrisc/trunk/or1ksim/pic/pic.c
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5101d 20h /openrisc/trunk/or1ksim/pic/pic.c
432 Updates to handle interrupts correctly. jeremybennett 5106d 05h /openrisc/trunk/or1ksim/pic/pic.c
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5109d 02h /openrisc/trunk/or1ksim/pic/pic.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5224d 10h /openrisc/trunk/or1ksim/pic/pic.c
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5231d 01h /openrisc/trunk/or1ksim/pic/pic.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5655d 12h /openrisc/trunk/or1ksim/pic/pic.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.