OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [sim-config.h] - Rev 134

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
100 Single precision FPU stuff for or1ksim julius 5290d 19h /openrisc/trunk/or1ksim/sim-config.h
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5296d 18h /openrisc/trunk/or1ksim/sim-config.h
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5317d 15h /openrisc/trunk/or1ksim/sim-config.h
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5325d 15h /openrisc/trunk/or1ksim/sim-config.h
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5656d 00h /openrisc/trunk/or1ksim/sim-config.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.