OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [ChangeLog] - Rev 290

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5225d 22h /openrisc/trunk/or1ksim/testsuite/ChangeLog
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5227d 00h /openrisc/trunk/or1ksim/testsuite/ChangeLog
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5237d 15h /openrisc/trunk/or1ksim/testsuite/ChangeLog
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5275d 15h /openrisc/trunk/or1ksim/testsuite/ChangeLog
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5275d 19h /openrisc/trunk/or1ksim/testsuite/ChangeLog
122 Added l.ror and l.rori with associated tests. jeremybennett 5276d 15h /openrisc/trunk/or1ksim/testsuite/ChangeLog
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5276d 16h /openrisc/trunk/or1ksim/testsuite/ChangeLog
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5277d 13h /openrisc/trunk/or1ksim/testsuite/ChangeLog
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5279d 16h /openrisc/trunk/or1ksim/testsuite/ChangeLog
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5280d 16h /openrisc/trunk/or1ksim/testsuite/ChangeLog
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5280d 17h /openrisc/trunk/or1ksim/testsuite/ChangeLog
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5281d 16h /openrisc/trunk/or1ksim/testsuite/ChangeLog
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5284d 16h /openrisc/trunk/or1ksim/testsuite/ChangeLog
104 Candidate release 0.4.0rc4 jeremybennett 5288d 00h /openrisc/trunk/or1ksim/testsuite/ChangeLog
99 Bug in test evaluation for library fixed. jeremybennett 5301d 18h /openrisc/trunk/or1ksim/testsuite/ChangeLog
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5302d 19h /openrisc/trunk/or1ksim/testsuite/ChangeLog
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5317d 01h /openrisc/trunk/or1ksim/testsuite/ChangeLog
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.		 jeremybennett 5319d 18h /openrisc/trunk/or1ksim/testsuite/ChangeLog
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5323d 17h /openrisc/trunk/or1ksim/testsuite/ChangeLog
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5330d 17h /openrisc/trunk/or1ksim/testsuite/ChangeLog

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.