URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [libsim.tests/] [jtag-write-command.exp] - Rev 226

Rev	Log message	Author	Age	Path
99	Bug in test evaluation for library fixed.	jeremybennett	5148d 02h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/jtag-write-command.exp
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5149d 03h	/openrisc/trunk/or1ksim/testsuite/libsim.tests/jtag-write-command.exp