OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [configure.ac] - Rev 151

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5152d 23h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
134 Updates for stable release 0.4.0 jeremybennett 5161d 03h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
127 New config option to allow l.xori with unsigned operand. jeremybennett 5166d 23h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5176d 20h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
104 Candidate release 0.4.0rc4 jeremybennett 5180d 03h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5215d 20h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5222d 20h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.