OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or_debug_proxy/] [src/] [gdb.c] - Rev 438

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 5146d 00h /openrisc/trunk/or_debug_proxy/src/gdb.c
376 Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.

Adding ChangeLog to or_debug_proxy
julius 5205d 08h /openrisc/trunk/or_debug_proxy/src/gdb.c
353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.
julius 5222d 01h /openrisc/trunk/or_debug_proxy/src/gdb.c
109 or_debug_proxy does signals with signals, just ignores signals julius 5314d 08h /openrisc/trunk/or_debug_proxy/src/gdb.c
94 Finally added byte reading to or_debug_proxy julius 5353d 21h /openrisc/trunk/or_debug_proxy/src/gdb.c
79 Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board julius 5375d 03h /openrisc/trunk/or_debug_proxy/src/gdb.c
47 debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions julius 5592d 07h /openrisc/trunk/or_debug_proxy/src/gdb.c
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5598d 08h /openrisc/trunk/or_debug_proxy/src/gdb.c
39 Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update julius 5682d 08h /openrisc/trunk/or_debug_proxy/src/gdb.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.