OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [Or1200MonitorSC.cpp] - Rev 51

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5426d 04h /openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5444d 22h /openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5496d 08h /openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp
6 Checking in ORPSoCv2 julius 5558d 20h /openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.