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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [OrpsocMain.cpp] - Rev 355

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354 Fixed ORPSoCv2 Dhrystone test, rewrote timer interrut

* sw/support/crt0.S: Tick timer interrupt to increment variable
now in place instead of calling customisable
interrupt vector handler

Changed all system frequencies in design to 50MHz.		 julius 5172d 14h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
70 ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\! julius 5374d 04h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
64 Trying to fix the system c model jtagsc.h checkout problem, also removed dependency generation in the system c modules makefile. julius 5403d 22h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
63 Finally adding RSP server to cycle accurate model, based on work by Jeremey Bennett but slightly modified for the debug unit we use. Adding binary logging file mode to cycle accurate model which allows smaller and quicker execution logging, along with binary log reader in sw/utils. Adding cycle accurate wishbone bus transaction log generation. still some bugs in CA model for some reason where it skips cycles when logging either execution or bus transactions. Changing or1200 du allowing hardware watchpoints on data load and stores. julius 5413d 20h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
52 ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation julius 5500d 16h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5514d 18h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5533d 12h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5584d 22h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
6 Checking in ORPSoCv2 julius 5647d 10h /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp

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