URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [TraceSC.cpp] - Rev 46

Rev	Log message	Author	Age	Path
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5591d 10h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5631d 04h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp
6	Checking in ORPSoCv2	julius	5653d 22h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp