URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [TraceSC.cpp] - Rev 46

Rev	Log message	Author	Age	Path
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5677d 17h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5717d 11h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp
6	Checking in ORPSoCv2	julius	5740d 05h	/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp