URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [UartSC.cpp] - Rev 70

Rev	Log message	Author	Age	Path
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5647d 08h	/openrisc/trunk/orpsocv2/bench/sysc/src/UartSC.cpp
6	Checking in ORPSoCv2	julius	5670d 03h	/openrisc/trunk/orpsocv2/bench/sysc/src/UartSC.cpp