URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [eth_phy.v] - Rev 801

Rev	Log message	Author	Age	Path
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	5129d 12h	/openrisc/trunk/orpsocv2/bench/verilog/eth_phy.v
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5135d 02h	/openrisc/trunk/orpsocv2/bench/verilog/eth_phy.v