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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [include/] [or1200_monitor_defines.v] - Rev 485

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485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 5045d 03h /openrisc/trunk/orpsocv2/bench/verilog/include/or1200_monitor_defines.v

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