URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [uart_decoder.v] - Rev 72

Rev	Log message	Author	Age	Path
65	ORPSoCv2 update: or1200_defines DVRDCR value, verilog testbench uart decoder fix	julius	5453d 13h	/openrisc/trunk/orpsocv2/bench/verilog/uart_decoder.v
6	Checking in ORPSoCv2	julius	5699d 20h	/openrisc/trunk/orpsocv2/bench/verilog/uart_decoder.v