URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [c/] [Makefile] - Rev 836

Rev	Log message	Author	Age	Path
493	ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues.	julius	5014d 03h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/Makefile
397	ORPSoCv2: doc/ path added, with Texinfo documentation. Still a work in progress. VPI files updated. OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction. Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.	julius	5128d 22h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/Makefile
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5637d 03h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/Makefile