URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [verilog/] [vpi_debug_defines.v] - Rev 673

Rev	Log message	Author	Age	Path
397	ORPSoCv2: doc/ path added, with Texinfo documentation. Still a work in progress. VPI files updated. OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction. Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.	julius	5130d 10h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_defines.v
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5558d 15h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_defines.v
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5638d 15h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_defines.v