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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [include/] [orpsoc-params.v] - Rev 544

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Rev Log message Author Age Path
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4911d 11h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/orpsoc-params.v
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 5081d 05h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/orpsoc-params.v
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5114d 19h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/orpsoc-params.v

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