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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [sw/] [Makefile.inc] - Rev 492

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485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 5023d 02h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 5040d 07h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 5049d 03h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 5102d 12h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5116d 11h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc

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