OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [README] - Rev 484

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 5122d 11h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/README
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5134d 10h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/README
71 ORPSoC board builds, adding readmes julius 5389d 02h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/readme.txt

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.