OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [bench/] [verilog/] [cy7c1354.v] - Rev 476

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5199d 10h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/verilog/cy7c1354.v
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5405d 19h /cy7c1354.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.