OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [include/] [uart_defines.v] - Rev 542

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4876d 02h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4880d 09h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5002d 20h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.