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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [doc/] [orpsoc.texi] - Rev 435

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425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 5122d 19h /openrisc/trunk/orpsocv2/doc/orpsoc.texi
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 5131d 04h /openrisc/trunk/orpsocv2/doc/orpsoc.texi
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.		 julius 5136d 06h /openrisc/trunk/orpsocv2/doc/orpsoc.texi
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 5136d 06h /openrisc/trunk/orpsocv2/doc/orpsoc.texi
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5136d 18h /openrisc/trunk/orpsocv2/doc/orpsoc.texi
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.		 julius 5140d 05h /openrisc/trunk/orpsocv2/doc/orpsoc.texi

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