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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [dbg_if/] [dbg_wb.v] - Rev 506

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363 ORPSoC's RTL code fixed to pass linting by Verilator.

ORPSoC's debug interface disabled for now in both RTL and System C top level.

Profiled building of cycle-accurate model now done correctly.
julius 5166d 15h /openrisc/trunk/orpsocv2/rtl/verilog/dbg_if/dbg_wb.v
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5168d 06h /openrisc/trunk/orpsocv2/rtl/verilog/dbg_if/dbg_wb.v
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5546d 14h /openrisc/trunk/orpsocv2/rtl/verilog/components/debug_if/dbg_wb.v
6 Checking in ORPSoCv2 julius 5645d 02h /openrisc/trunk/orpsocv2/rtl/verilog/components/debug_if/dbg_wb.v

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