OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [ethmac/] [eth_crc.v] - Rev 633

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
618 Remove unused parameter Tp olof 4855d 02h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_crc.v
570 Fix white space in ethmac headers olof 4869d 22h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_crc.v
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5127d 03h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_crc.v
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5128d 20h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_crc.v
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5180d 22h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_crc.v
6 Checking in ORPSoCv2 julius 5657d 18h /openrisc/trunk/orpsocv2/rtl/verilog/components/ethernet/eth_crc.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.