OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [ethmac/] [eth_maccontrol.v] - Rev 477

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5114d 10h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_maccontrol.v
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5116d 04h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_maccontrol.v
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5168d 05h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_maccontrol.v
6 Checking in ORPSoCv2 julius 5645d 02h /openrisc/trunk/orpsocv2/rtl/verilog/components/ethernet/eth_maccontrol.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.