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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [ethmac/] [eth_random.v] - Rev 775

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Rev Log message Author Age Path
618 Remove unused parameter Tp olof 4873d 12h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_random.v
570 Fix white space in ethmac headers olof 4888d 08h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_random.v
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5145d 13h /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_random.v
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5147d 07h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_random.v
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5199d 08h /openrisc/trunk/orpsocv2/rtl/verilog/eth/eth_random.v
6 Checking in ORPSoCv2 julius 5676d 04h /openrisc/trunk/orpsocv2/rtl/verilog/components/ethernet/eth_random.v

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