URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [uart16550/] [uart_rfifo.v] - Rev 404

Rev	Log message	Author	Age	Path
363	ORPSoC's RTL code fixed to pass linting by Verilator. ORPSoC's debug interface disabled for now in both RTL and System C top level. Profiled building of cycle-accurate model now done correctly.	julius	5179d 11h	/openrisc/trunk/orpsocv2/rtl/verilog/uart16550/uart_rfifo.v
360	First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken	julius	5181d 01h	/openrisc/trunk/orpsocv2/rtl/verilog/uart16550/uart_rfifo.v
6	Checking in ORPSoCv2	julius	5657d 21h	/openrisc/trunk/orpsocv2/rtl/verilog/components/uart16550/uart_rfifo.v