URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [wb_switch_b3/] [wb_switch_b3.v] - Rev 803

Rev	Log message	Author	Age	Path
360	First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken	julius	5188d 14h	/openrisc/trunk/orpsocv2/rtl/verilog/wb_switch_b3/wb_switch_b3.v
351	OR1200 with icarus fixed up. MMu test fix, remove testfloat elf, adding new arbiter and RAM, may break verilator compatibility... TODO	julius	5191d 14h	/openrisc/trunk/orpsocv2/rtl/verilog/components/wb_switch_b3/wb_switch_b3.v