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[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] [bin/] [definesgen.inc] - Rev 719

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411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5121d 03h /openrisc/trunk/orpsocv2/sim/bin/definesgen.inc
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5123d 21h /openrisc/trunk/orpsocv2/sim/bin/definesgen.inc

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