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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [Makefile.inc] - Rev 495

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Rev Log message Author Age Path
487 ORPSoC main software makefile update julius 5068d 02h /openrisc/trunk/orpsocv2/sw/Makefile.inc
486 ORPSoC updates, mainly software, i2c driver julius 5068d 02h /openrisc/trunk/orpsocv2/sw/Makefile.inc
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 5090d 10h /openrisc/trunk/orpsocv2/sw/Makefile.inc
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 5098d 07h /openrisc/trunk/orpsocv2/sw/Makefile.inc
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 5124d 21h /openrisc/trunk/orpsocv2/sw/Makefile.inc
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 5151d 16h /openrisc/trunk/orpsocv2/sw/Makefile.inc
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 5160d 01h /openrisc/trunk/orpsocv2/sw/Makefile.inc
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5165d 15h /openrisc/trunk/orpsocv2/sw/Makefile.inc
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5166d 20h /openrisc/trunk/orpsocv2/sw/Makefile.inc
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 5169d 02h /openrisc/trunk/orpsocv2/sw/Makefile.inc
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 5172d 01h /openrisc/trunk/orpsocv2/sw/Makefile.inc
392 ORPSoCv2 software path reorganisation stage 1. julius 5172d 17h /openrisc/trunk/orpsocv2/sw/Makefile.inc
361 OPRSoCv2 - adding things left out in last check-in julius 5218d 22h /openrisc/trunk/orpsocv2/sw/Makefile.inc
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5218d 22h /openrisc/trunk/orpsocv2/sw/Makefile.inc
349 ORPSoCv2 update with new software and makefile update julius 5222d 02h /openrisc/trunk/orpsocv2/sw/Makefile.inc

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