URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [exceptions.c] - Rev 477

Rev	Log message	Author	Age	Path
411	Improved ethmac testbench and software. Renamed some OR1200 library functions to be more generic. Fixed bug with versatile_mem_ctrl for Actel board. Added ability to simulate gatelevel modules alongside RTL modules in board build.	julius	5144d 06h	/openrisc/trunk/orpsocv2/sw/drivers/or1200/exceptions.c
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5152d 05h	/openrisc/trunk/orpsocv2/sw/drivers/or1200/exceptions.c
349	ORPSoCv2 update with new software and makefile update	julius	5202d 05h	/exceptions.c