OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [include/] [int.h] - Rev 857

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
489 ORPSoC sw cleanup. Remove warnings. julius 5068d 04h /openrisc/trunk/orpsocv2/sw/drivers/or1200/include/int.h
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5167d 04h /openrisc/trunk/orpsocv2/sw/drivers/or1200/include/int.h
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 5175d 02h /openrisc/trunk/orpsocv2/sw/drivers/or1200/include/int.h
349 ORPSoCv2 update with new software and makefile update julius 5225d 03h /int.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.