URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [simple-spi/] [simple-spi.c] - Rev 485

Rev	Log message	Author	Age	Path
485	ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501	julius	5045d 04h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	5132d 23h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5144d 23h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
374	ORPSoCv2 adding some files forgotten from last checkin	julius	5177d 22h	/simple-spi.c