URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [simple-spi/] [simple-spi.c] - Rev 482

Rev	Log message	Author	Age	Path
482	ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes.	julius	4925d 08h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	4997d 00h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5009d 01h	/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
374	ORPSoCv2 adding some files forgotten from last checkin	julius	5042d 00h	/simple-spi.c