URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [sdram/] [sim/] [sdram-cols.c] - Rev 477

Rev	Log message	Author	Age	Path
426	ORPSoC update Reverted back to previous OR1200 instruction cache. (...which...) Fixed or1200-except test failure on generic model. ML501 build not passing or1200-except test. Tried disabling burst on the bus (memory server doesn't support it yet) to no avail. To be continued...	julius	5107d 04h	/openrisc/trunk/orpsocv2/sw/tests/sdram/sim/sdram-cols.c
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5127d 14h	/openrisc/trunk/orpsocv2/sw/tests/sdram/sim/sdram-cols.c
349	ORPSoCv2 update with new software and makefile update	julius	5177d 15h	/sdram-cols.c