URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [arch/] [Makefile] - Rev 831

Rev	Log message	Author	Age	Path
799	FreeRTOSV6.1.1 add cache related function from u-boot from OpenRISC enable I/D cache if present	filepang	4575d 04h	/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile
621	update sim.cfg for newer version of Or1ksim. remove unused files. cleanup source code. insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will be returned by xPortEndScheduler().	filepang	4845d 08h	/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile
620	remove unused file cleanup makefile update uart_init(), disable interrupt before initialize.	jeremybennett	4845d 21h	/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile
584	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4859d 18h	/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile