OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [config.sub] - Rev 1771

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5767d 01h /or1k/branches/stable_0_1_x/or1ksim/config.sub
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7255d 14h /or1k/branches/stable_0_1_x/or1ksim/config.sub
1242 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.
hpanther 7629d 10h /or1k/branches/stable_0_1_x/or1ksim/config.sub
826 or32-uclinux target added markom 8285d 14h /or1k/branches/stable_0_1_x/or1ksim/config.sub
397 removed or16 architecture markom 8426d 12h /or1k/branches/stable_0_1_x/or1ksim/config.sub
18 or16 added, or1k renamed to or32. lampret 9000d 16h /or1k/branches/stable_0_1_x/or1ksim/config.sub
9 Added support for OpenRISC 100 and DLX. jrydberg 9061d 08h /or1k/branches/stable_0_1_x/or1ksim/config.sub
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.
jrydberg 9061d 08h /or1k/branches/stable_0_1_x/or1ksim/config.sub

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.