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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [common/] [abstract.h] - Rev 1775

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1765 root 5747d 22h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7236d 10h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1352 Optimise execution history tracking nogj 7238d 02h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7238d 03h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1346 Remove the global op structure nogj 7251d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7251d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7354d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
1308 Gyorgy Jeney: extensive cleanup phoenix 7442d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
970 Testbench is now running on ORP architecture platform. simons 8146d 23h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
897 improved CUC GUI; pre/unroll bugs fixed markom 8176d 04h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
882 Routine for adjusting read and write delay for devices added. simons 8186d 08h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
720 single floating point support added markom 8309d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
638 TLBTR CI bit is now working properly. simons 8341d 23h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
543 Memory controller fixed. simons 8366d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
538 memory width increased to 32bit; new memory test mem_test added - simple big endian test markom 8366d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
537 memory cycles are calculated according to parameters from .cfg file markom 8366d 12h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8384d 07h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8386d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
433 clkcycle parameter added to configuration markom 8393d 12h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h
429 cache configuration added markom 8394d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/abstract.h

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