OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [common/] [labels.c] - Rev 1775

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5755d 17h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7244d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7245d 22h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7450d 17h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
1049 Added "breaks" command that prints all set breakpoints. ivang 8125d 23h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
557 some optimizations; fsim running at 2MIPS; pm section added to config; configure bug fixed markom 8372d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c
269 added labels; corrected false if clause, preventing to fill iqueue markom 8438d 08h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/labels.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.