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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [common/] [stats.h] - Rev 1768

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1765 root 5770d 12h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7259d 00h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7632d 20h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
535 stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time markom 8389d 20h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
532 removed stats 6 command, handling SLP; function profiling is supported by profiler; subroutine level parallelism is not covered yet, but should be done in profiler markom 8390d 02h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
77 Regular update. lampret 8824d 03h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
65 Added DMMU stats. lampret 8843d 03h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
34 Started with SLP (not finished yet). lampret 8966d 10h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
30 Updated SPRs, exceptions. Added 16450 device. lampret 8970d 12h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
24 Static branch prediction added. lampret 9001d 07h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 9065d 13h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9191d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h
2 First import. cvs 9191d 06h /or1k/branches/stable_0_1_x/or1ksim/cpu/common/stats.h

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