OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [or32/] [or32.c] - Rev 1768

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5770d 12h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7259d 00h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7260d 17h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1346 Remove the global op structure nogj 7273d 20h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7273d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1341 Mark wich operand is the destination operand in the architechture definition nogj 7273d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1338 l.ff1 instruction added andreje 7289d 19h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1309 removed includes phoenix 7462d 14h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7465d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7487d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1286 Changed desciption of the l.cust5 insns lampret 7536d 15h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1285 Changed desciption of the l.cust5 insns lampret 7536d 15h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1169 Added support for l.addc instruction. csanchez 7849d 15h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1114 Added cvs log keywords lampret 8004d 07h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
1034 Fixed encoding for l.div/l.divu. lampret 8146d 08h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
879 Initial version of OpenRISC Custom Unit Compiler added markom 8211d 18h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
801 l.muli instruction added markom 8303d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
722 floating point registers are obsolete; GPRs should be used instead markom 8331d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
720 single floating point support added markom 8332d 01h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c
717 some minor improvements markom 8332d 03h /or1k/branches/stable_0_1_x/or1ksim/cpu/or32/or32.c

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.